So, we had to do a project.
One dock. Four switches. A threshold that decides when a ship is full.
CSE 4206, unhurried.
Digital Logic Design Lab · IUT Summer 2024–2025 · Proteus · 74LS TTL
Ship Cargo Loading System
Accumulate, compare, display, depart. A full ship clears the dock by itself.
One schematic, four corners.
OR-tree validation
Empty ships are turned away before anything latches.
Adder plus memory
U7 adds SW and Q. U6 keeps the running total.
Readable decimal
Q of 10 or more gets a plus-six correction.
A comparator decides
Yellow below, red over, green exact. Green counts and clears.
Slow freight, five moves.
Set cargo on SW0–SW3. All low means no pulse.
Pulse arrival. The sum lands in U6.
Read tens and units. Ten and above is corrected.
Compare against B0–B3. Watch the three lamps.
On exact match, departures rise by one and the dock returns to zero.
Eleven chips, no more.
U1 74LS32 · OR-tree + BCD detect
U2 74LS08 · pulse gate + detect
U3 U4 U11 74LS47 · displays
U5 U7 74LS283 · correct + accumulate
U6 74LS193 · dock register
U8 74LS04 · PL invert
U9 74LS85 · comparator
U10 74LS90 · departures
R1 10k pull-up · D1–D3 lamps
What we cut.
Dual-dock routing, the 5-state storm FSM, and the drain engine were removed after Proteus SPICE refused to converge. The comparator outputs already carried the three states that mattered. Full reasoning in report §5.
Pulse a ship yourself.
Cargo
Capacity
Report, file, film.
Read the report, open the Proteus file, watch the demo.